Conventionally, a vertical semiconductor element having a super junction structure, which is made of n-type columns and p-type columns alternately and repetitively arranged in a form of stripe in a drift layer, has been proposed. (For example, see Japanese Patent Application Publications No. 2001-111041 and No. 2010-3970). The most distinctive feature of the super junction structure is the drift layer having n-columns and p-columns repetitively formed therein. The n-columns form a current path in an on state. The p-columns cancel an electrical charge and expand a depletion layer as if there is no electrical charge exists in an off state. Of these elements, the drift layer functions as a major part in regard to an on-state resistance and a withstand voltage. Further, in the super junction structure, the withstand voltage is obtained as a charge balance is achieved by equalizing the amount of electrical charge between the n-columns and the p-columns.
However, a difference may occur between the amount of electrical charge of the n-columns and the amount of the electrical charge of the p-columns due to a processing variation caused when forming the n-columns and the p-columns. If the difference is large, an electrical charge that is not cancelled restricts the depletion layer from expanding. As a result, a desired withstand voltage is not obtained.
In this way, in the semiconductor device with the vertical semiconductor element having the super junction structure, a withstand voltage yield decreases due to the processing variation in forming the n-columns and the p-columns. The decrease of the withstand voltage yield is more prominent as the concentration of the n-columns is increased so as to reduce the on-state resistance. This is because the difference of the amount of the electrical charge between the n-columns and the p-columns caused by the processing variation increases. Therefore, the super junction structure has a trade-off relationship between the on-state resistance and the withstand voltage yield. Further, the trade-off relationship becomes more severe with an increase in withstand voltage.
To address the issue described above, it is considered to incline the p-column in a depth direction such that a side surface of the p-column has a tapered angle. When the side surface of the p-column has the tapered angle, the withstand voltage is less likely to reduce even if the difference occurs between the amount of the electrical charge of the n-column and the amount of the electrical charge of the p-column due to the processing variation. Therefore, because a margin for the processing variation increases, the trade-off relationship between the on-state resistance and the withstand voltage yield improves.
However, if the tapered angle of the side surface of the p-column excessively increases, a central withstand voltage reduces. In this case, therefore, the margin for the processing variation adversely reduces.
A design idea for suppressing the decrease of the withstand voltage by forming the tapered angle on the side surface of the p-column is described hereinabove. Also, the decrease of the withstand, voltage is suppressed based on a concentration relationship between the n-columns and p-columns with respect to the depth direction of the p-column. Also in such a case, the similar drawback described above will arise.